In 64-bit, AMD took the lead from Intel. Intel made a huge strategic error years ago when it hyped it's Itanium (IA64) architecture too early. At the time, it was slower than the 32-bit stuff and simply not available.

In the late '90s, many companies were trying to design products around Intel's stuff, and as a result a lot of people got burned.

But, anyway, times change. The game of leapfrog continues.

 

So when they say 64-bit architecture, what do they mean? I'm assuming 64-bit registers, 64 data lines, 64-bit memory addressing?

That's all, right? Because 2^64 different instructions seems a bit excessive, even for CISC.

 

That's essentially right, Jack.

The differences in these architectures is all in how it's done, Jack...

IA64 (Itanium) is essentially RISC (huge register sets, very intelligent compilers, etc.). It bears NO resemblance to IA32 (but does support an IA32 mode which makes it very complex), and while it's an interesting architecture it's more borrowed from what HP did in the late '80s / early '90s than an evolution from earlier Intel architecture (IA32).

AMD said, this. Let's figure out how to extend IA32 (which has just a handful of registers, and a ton of instructions). Reading AMD-64 code is very simple step up from IA32. Ironic, eh? Intel should've been the ones to do this.

 

to the company that said " this".

 

Indeed. Proof, once again, that competition is a positive force in the marketplace!

 

http://www.apple.com/switch/whyswitch/

 

Actually IA64 is the antithesis of RISC. It's an enormously complex instruction even ignoring the IA32 mode. The designers call it EPIC, which is woefully accurate. The design is supposed to facilitate parallelism at the instruction level (and headaches).

 

Well, that's a good point, but it really is an evolution of what RISC was in the industry (caches, register files, branch prediction control in software). Academically speaking, I agree. It's definitely not RISC.

Do you work in the biz, watermelonman?

 

 

Just doing my part.....